Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET)
Provides integrated circuit packaging and testing, as well as advanced packaging (Chiplet/2.5D/3D) solutions
Top-3 global packaging and testing scale + leading domestic advanced packaging technology platform (TSV, fan-out, Chiplet)
Company Overview
Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET), founded in 1972 as the Jiangyin Transistor Plant, was listed on the Shanghai Stock Exchange in 2003 (ticker: 600584.SH) and is headquartered in Jiangyin, Jiangsu Province. The company specializes in integrated circuit packaging and testing. It is the largest and most technologically advanced OSAT company in China, ranking third globally in the packaging and testing industry (behind ASE Technology Holding and Amkor Technology). In the AI industry chain, JCET occupies the advanced packaging segment within the "Core Computing and Communication Hardware" tier, playing a key role in integrating multiple mature-process chips via Chiplet technology to boost computing power.
It covers system-in-package (SiP), 2.5D/3D TSV packaging, fan-out wafer-level packaging (FOWLP/FOPLP), and Chiplet-based heterogeneous integration solutions. It primarily serves high-performance computing fields such as AI accelerator cards, CPU/GPU, and network communication chips. In 2023, this business line generated revenue of approximately RMB 16.3 billion with a gross margin of about 25%. Core customers include leading AI chip design companies and IDM manufacturers in China and globally.
It includes lead-frame packaging, substrate packaging (BGA/LGA), wafer testing, and final test services. It serves a broad range of markets including consumer electronics, automotive electronics, and industrial control. In 2023, revenue was approximately RMB 13.3 billion with a gross margin of about 18%. The customer base spans numerous small and mid-sized chip design companies and foundries.
| Product Line | Revenue Share | Core Customers | Gross Margin |
|---|---|---|---|
| Advanced Packaging (SiP/Chiplet/3D) | ~55% | AI chip companies, communication SoC vendors | ~25% |
| Traditional Packaging and Testing | ~45% | Consumer electronics, automotive chip customers | ~18% |
Technology Moat
Moat 1: Globally Leading Mass-Production Capability in Advanced Packaging
JCET is one of the few companies in China capable of providing 2.5D/3D TSV, fan-out (FOWLP), and Chiplet integrated packaging with large-scale mass production. Its wholly-owned subsidiary STATS ChipPAC has accumulated over 20 years of international packaging experience and offers the XDFOI™ platform (Chiplet multi-die integration) for AI/high-performance computing. Against the backdrop of advanced process restrictions, JCET helps customers achieve system performance close to that of advanced nodes by using mature-process chiplets, forming an alternative path to boost computing power.
Moat 2: Scale and Customer Stickiness
With the world's third-largest packaging capacity and stable yield control, JCET enjoys significant cost advantages and delivery assurance. It is deeply bound with domestic core chip makers such as HiSilicon, SMIC, and UNISOC, and serves European and American customers through a global footprint (mainland China, Singapore, Korea, and the United States). Switching costs are high, resulting in strong customer stickiness.
| Dimension | Data |
|---|---|
| Global market share | ~10% (2023) |
| Industry ranking | No. 3 globally, No. 1 in mainland China |
| Major competitors | ASE Technology Holding (No.1 globally), Amkor Technology (No.2 globally), Tongfu Microelectronics, Huatian Technology |
| Downstream customers | HiSilicon, UNISOC, SMIC, AMD, Qualcomm, Broadcom, etc. |
The domestic packaging and testing market is relatively concentrated, with JCET, Tongfu Microelectronics, and Huatian Technology accounting for about 60% of the domestic share combined. In the advanced packaging segment for AI, JCET is one of the few companies other than TSMC (CoWoS) that can offer outsourced Chiplet 2.5D/3D solutions, giving it a prominent technology barrier.
Financials and Growth
| Metric | Data (2023 Annual Report) |
|---|---|
| Revenue | RMB 29.6 billion |
| Gross Margin | 20.6% |
| Net Margin | 5.2% |
| Core growth logic | AI computing power demand surge drives both volume and price growth in advanced packaging; accelerated domestic substitution increases penetration among domestic customers; Chiplet technology becomes the mainstream post-Moore's-law approach, positioning JCET at a key link |
Future growth drivers: 1) Continued rise in demand for Chiplet packaging from AI training/inference chips; 2) Increasing penetration of advanced packaging in automotive electronics and HPC; 3) The company continues to expand high-value-added advanced packaging capacity (e.g., Jiangyin and Korea bases), which is expected to improve gross margin and net margin.
Key Risks:
- Industry cyclicality risk: The semiconductor industry is highly cyclical; weak downstream demand may lead to lower capacity utilization.
- Technology iteration risk: Advanced packaging technologies (e.g., hybrid bonding, higher interconnect density) are evolving rapidly; R&D lag could result in being squeezed by competitors or by IDM in-house capacity such as TSMC.
- Overseas sanctions and geopolitical risk: Restrictions on overseas equipment/materials and sanctions on some customers may affect product exports or supply chain stability.
- Capacity expansion shortfall risk: New production line ramp-up and equipment procurement cycles may affect revenue growth pace.
Core investment logic / industry value summary:
As the domestic leader in packaging and testing, JCET possesses scarce large-scale mass-production capability in advanced packaging (especially Chiplet/2.5D/3D). It is an indispensable infrastructure link in the localization of AI computing power. With the explosive demand for advanced packaging in AI inference chips, edge intelligence, and automotive electronics, the company will deeply benefit from an independent packaging and testing ecosystem complementary to TSMC's CoWoS. In the long run, the combined effect of its technology moat and domestic substitution dividend is expected to continue lifting the valuation center.