Company Overview
Founded in 1987, Taiwan Semiconductor Manufacturing Company (TSMC) is the world's first dedicated integrated circuit foundry, headquartered in Hsinchu, Taiwan, China. It listed on the Taiwan Stock Exchange in 1994 (ticker 2330) and on the New York Stock Exchange via American Depositary Receipts (TSM) in 1997. The company's core business is semiconductor wafer foundry, covering a full range of process technologies from mature nodes (28nm and above) to the most advanced nodes (3nm/2nm), while also offering advanced packaging services such as CoWoS. In the AI industry chain, TSMC occupies the manufacturing and packaging segment of core computing and communications hardware, serving as the sole or primary supplier to world-class chip design companies such as NVIDIA, AMD, and Apple — often described as the "physical foundation of AI computing power."
Advanced process nodes are TSMC's core revenue source, mainly including 5nm (N5), 4nm (N4), 3nm (N3, N3E), and the upcoming 2nm (N2). These nodes are widely used in high-performance computing scenarios such as AI accelerator chips (GPU/TPU), premium smartphone SoCs, and server CPUs/GPUs. Key customers include NVIDIA (Blackwell series), Apple (A18/M4 series), AMD (Ryzen/Instinct series), and Qualcomm (Snapdragon 8 Elite). In 2025, 3nm node revenue is expected to account for more than 40%, with 2nm starting to contribute revenue in the second half of the year.
Mature nodes, including 28nm, 45nm, and 65nm, are mainly used in automotive electronics (MCUs, sensors), IoT, RF front-end, and power management chips. Although growth is moderate, TSMC's specialty processes for automotive (such as eFlash and BCD) are highly competitive, with customers including NXP and Texas Instruments.
The advanced packaging business is growing extremely rapidly and is key to AI chip performance breakthroughs. CoWoS (Chip-on-Wafer-on-Substrate) integrates GPU compute cores with HBM high-bandwidth memory through a silicon interposer, breaking through the memory bandwidth bottleneck. In 2025, CoWoS monthly capacity is expected to reach 40,000–60,000 wafers, yet demand still outstrips supply. SoIC (3D stacking) targets even more advanced heterogeneous integration. Main customers: NVIDIA (all H100/B200 series), AMD (MI300 series), Google (TPU v5).
| Business Segment | Revenue Share | Key Customers | Estimated Gross Margin |
|---|---|---|---|
| Advanced process (below 7nm) | ~75% | NVIDIA, Apple, AMD, Qualcomm | ~55%-60% |
| Mature/specialty process (28nm+) | ~15% | NXP, STMicroelectronics, TI | ~35%-40% |
| Advanced packaging (CoWoS/SoIC) | ~10% | NVIDIA, AMD, Google | ~40%-45% |
Technology Moat
Moat 1: Ultimate Process Scaling (3nm → 2nm GAA)
TSMC has achieved the industry's highest density and energy efficiency with FinFET architecture (the N3 series outperforms competitor Samsung's 3nm GAA in performance and yield), and has already taken the lead into the GAA (Gate-All-Around) era. Its 2nm (N2) process uses nanosheet transistors and is expected to enter mass production in 2025, continuing to lead Intel (Intel 18A) and Samsung (SF2) in logic density and power-performance. TSMC invests more than $15 billion annually in R&D, maintaining a technology lead of 2–3 generations.
Moat 2: Scarcity of CoWoS Advanced Packaging Capacity
CoWoS is the key solution to the current AI chip performance bottleneck. TSMC is the world's only supplier capable of high-volume CoWoS production (Samsung/Intel are still catching up). Due to explosive AI demand, CoWoS capacity remains tight. TSMC is allocating approximately 30% of its 2024–2026 capital expenditures to expand advanced packaging capacity, creating an integrated "manufacturing + packaging" advantage that competitors will find difficult to replicate in the short term.
Moat 3: Extremely Strong Customer Lock-in Effect
TSMC provides customers with one-stop "design-manufacturing-packaging" services (through its design ecosystem such as PDKs and process libraries). Once a customer selects a foundry platform, switching costs are extremely high. Customized processes for top customers such as Apple, NVIDIA, and AMD (e.g., NVIDIA's custom 4N process) further reinforce the lock-in effect. In 2024, the top ten customers accounted for over 80% of revenue, and this has remained stable over the long term.
| Dimension | Data |
|---|---|
| Global wafer foundry market share | ~60% (2025 estimate, excluding memory foundry) |
| Industry ranking | #1 |
| Main competitors | Samsung Electronics (~12% share), Intel (~8% share, including internal manufacturing) |
| Downstream customers | NVIDIA, Apple, AMD, Qualcomm, MediaTek, Broadcom, Google, Amazon |
| Advanced process (below 7nm) market share | >90% (near-monopoly globally) |
| CoWoS packaging market | TSMC controls over 85% of capacity |
Competitive Landscape Analysis: Samsung lags 1–2 years behind TSMC in 3nm GAA mass production with lower yields. Although Intel has proposed an IDM 2.0 strategy (opening up foundry services), it has yet to win major customer orders at advanced process nodes. TSMC's leadership is unlikely to be shaken in the short term.
Financials and Growth
| Metric | Data (2024) | 2025 Estimate (based on AI demand) |
|---|---|---|
| Revenue | NT$2.89 trillion (~US$90 billion) | NT$3.3–3.5 trillion |
| Gross margin | 53.6% | 54%–56% |
| Net margin | 39.5% | 40%–42% |
| Capital expenditure | ~US$32 billion | ~US$35 billion (including advanced packaging) |
| Core growth logic | AI chip demand explosion (GPU/ASIC), CoWoS capacity doubling, 3nm/2nm penetration increase |
Growth Drivers:
- AI compute arms race: Self-developed AI chips from NVIDIA, AMD, Google, and Amazon all rely on TSMC's advanced process plus CoWoS packaging. AI-related revenue share will exceed 25% in 2025.
- 3nm/2nm technology premium: Advanced node foundry prices are 4–6 times higher than mature nodes, and customers' pursuit of performance gives TSMC strong pricing power.
- Advanced packaging as a new growth pole: CoWoS revenue is projected to grow from ~US$3 billion in 2023 to US$8–10 billion in 2025, representing a CAGR of over 60%.
Key Risks:
- Geopolitical risk: Tensions in the Taiwan Strait could disrupt TSMC's production capacity. The company has diversified risk by building fabs in Japan, the United States, Germany, and Taiwan, China, but capacity migration is limited in speed.
- Technology iteration risk: Sub-2nm nodes (e.g., 1.4nm) pose dramatically greater challenges in materials (e.g., High-NA EUV lithography) and power; a misstep in technology roadmap could cause TSMC to fall behind competitors.
- High customer concentration: The top three customers (Apple, NVIDIA, AMD) contribute over 50% of revenue; if a major customer shifts to internal manufacturing or reduces foundry orders, results would be severely impacted.
- Capital expenditure pressure: Annual capex exceeding US$30 billion causes free cash flow volatility; if AI demand misses expectations, huge investments could weigh on profitability.
Core Investment Thesis / Industry Value Summary:
TSMC is the most critical "infrastructure" company in the AI industry chain. Its advanced process and packaging technologies form an insurmountable "physical moat." As AI chips boom across both training and inference, TSMC will continue to enjoy excess profits driven by technology premiums and tight capacity. Although geopolitical risk cannot be ignored, its monopolistic position in semiconductor manufacturing will continue to support long-term value.